2024年2月27日发(作者:江南tt汽车)

M74HC1383 TO 8 LINE DECODER (INVERTING)sssssssHIGH SPEED:tPD = 13ns (TYP.) at VCC = 6VLOW POWER DISSIPATION:ICC = 4?A(MAX.) at TA=25°CHIGH NOISE IMMUNITY:VNIH = VNIL = 28 % VCC (MIN.)SYMMETRICAL OUTPUT IMPEDANCE:|IOH| = IOL = 4mA (MIN)BALANCED PROPAGATION DELAYS:tPLH

? tPHL

WIDE OPERATING VOLTAGE RANGE:VCC (OPR) = 2V to 6VPIN AND FUNCTION COMPATIBLE WITH

74 SERIES 138

DIPSOPTSSOPORDER CODES

PACKAGEDIPSOPTSSOPTUBEM74HC138B1RM74HC138M1RT & RM74HC138RM13TRM74HC138TTRDESCRIPTIONThe M74HC138 is an high speed CMOS 3 TO 8LINE DECODER fabricated with silicon gateC2MOS the device is enabled, 3 binary select inputs (A,B, and C) determine which one of the outputs willgo low. If enable input G1 is held low or either G2Aor G2B is held high, the decoding function isinhibited and all the 8 outputs go high. Threeenable inputs are provided to ease cascadeconnection and application of address decodersfor memory inputs are equipped with protection circuitsagainst static discharge and transient CONNECTION AND IEC LOGIC SYMBOLSJuly 20011/10

M74HC138INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION

PIN No1, 2, 34, 569, 10, 11, 12,

13, 14, 15,

7816SYMBOLA, B, CG2A, G2BG1Y0 to Y7NAME AND FUNCTIONAddress InputsEnable InputsEnable InputData OutputsGNDVCCGround (0V)Positive Supply VoltageTRUTH TABLE

INPUTSENABLEG2BXXHLLLLLLLLG2AXHXLLLLLLLLG1LXXHHHHHHHHCXXXLLLLHHHHSELECTBXXXLLHHLLHHAXXXLHLHLHLHY0HHHLHHHHHHHY1HHHHLHHHHHHY2HHHHHLHHHHHOUTPUTSY3HHHHHHLHHHHY4HHHHHHHLHHHY5HHHHHHHHLHHY6HHHHHHHHHLHY7HHHHHHHHHHLX : Don’t CareLOGIC DIAGRAM

This logic diagram has not be used to estimate propagation delays2/10

M74HC138ABSOLUTE MAXIMUM RATINGS

SymbolVCCVIVOIIKIOKIOPDTstgTLSupply VoltageDC Input VoltageDC Output VoltageDC Input Diode CurrentDC Output Diode CurrentDC Output CurrentPower DissipationStorage TemperatureLead Temperature (10 sec)ParameterValue-0.5 to +7-0.5 to VCC + 0.5-0.5 to VCC + 0.5± 20± 20± 25± 50500(*)-65 to +150300UnitVVVmAmAmAmAmW°C°CICC or IGNDDC VCC or Ground CurrentAbsolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is

not implied(*) 500mW at 65

°C; derate to 300mW by 10mW/°C from 65°C to 85°CRECOMMENDED OPERATING CONDITIONS

SymbolVCCVIVOToptr, tfSupply VoltageInput VoltageOutput VoltageOperating TemperatureInput Rise and Fall TimeVCC = 2.0VVCC = 4.5VVCC = 6.0VParameterValue2 to 60 to VCC0 to VCC-55 to 1250 to 10000 to 5000 to 400UnitVVV°Cnsnsns3/10

M74HC138DC SPECIFICATIONS

Test ConditionSymbolParameterVCC(V)2.04.56.02.04.56.02.04.56.04.56.0VOLLow Level Output

Voltage2.04.56.04.56.0IIICCInput Leakage

CurrentQuiescent Supply

Current6.06.0IO=-20 ?AIO=-20 ?AIO=-20 ?AIO=-4.0 mAIO=-5.2 mAIO=20 ?AIO=20 ?AIO=20 ?AIO=4.0 mAIO=5.2 mAVI = VCC or GNDVI = VCC or GNDTA = 25°CMin.1.53.154.20.51.351.81.94.45.94.185.682.04.56.04.315.80.00.00.00.170.180.10.10.10.260.26± 0.141.94.45.94.135.630.10.10.10.330.33± -40 to 85°CMin.1.53.154.20.51.351.81.94.45.94.105.600.10.10.10.400.40± 180?A?AVVMax.-55 to 125°IHHigh Level Input

VoltageLow Level Input

VoltageHigh Level Output

VoltageVILVVOHAC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6ns)

Test ConditionSymbolParameterVCC(V)2.04.56.02.04.56.02.04.56.0TA = 25°.3412Max.751202420Value-40 to 85°.951503026-55 to 125°.111803631nsUnittTLH tTHLOutput Transition

TimetPLH tPHLPropagation Delay

Time (A, B, C - Y)tPLH tPHLPropagation Delay

Time (G, G - Y)nsns4/10

M74HC138CAPACITIVE CHARACTERISTICS

Test ConditionSymbolParameterVCC(V)5.05.0TA = 25°.547Max.10Value-40 to 85°.10-55 to 125°.10pFpFUnitCINCPDInput CapacitancePower Dissipation

Capacitance (note

1)1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without

load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC

TEST CIRCUIT

CL = 50pF or equivalent (includes jig and probe capacitance)RT = ZOUT of pulse generator (typically 50?)WAVEFORM 1: PROPAGATION DELAYS FOR INVERTING OUTPUTS (f=1MHz; 50% duty cycle)

5/10

M74HC138WAVEFORM 2: PROPAGATION DELAYSFOR NON-INVERTING OUTPUTS (f=1MHz; 50% duty cycle)

6/10

M74HC138Plastic DIP-16 (0.25) MECHANICAL 001C7/10

M74HC138SO-16 MECHANICAL 1a2bb1Cc1DEee3FGLMS3.84.60.50.350.190.545° (typ.)

9.8100.3855.81.278.894.05.31.270.628°(max.).0.0680.0070.0640.0180.0100.3930.244PO13H8/10

M74HC138TSSOP16 MECHANICAL 1A2bcDEE1eKL0°0.450.600.050.80.190.094.96.24.356.44.40.65 BSC8°0.750°0.0180.0241TYPMAX.1.20.151.050.300.205.16.64.480.0020.0310.0070.0040.1930.2440.1690.1970.2520.1730.0256 BSC8°.0.0470.0060.0410.0120.00890.2010.2600.176inchAA2A1beKcLEDE1PIN 1 IDENTIFICATION10080338D9/10

M74HC138Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for theconsequences of use of such information nor for any infringement of patents or other rights of third parties which may result fromits use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specificationsmentioned in this publication are subject to change without notice. This publication supersedes and replaces all informationpreviously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices orsystems without express written approval of STMicroelectronics.? The ST logo is a registered trademark of STMicroelectronics? 2001 STMicroelectronics - Printed in Italy - All Rights ReservedSTMicroelectronics GROUP OF COMPANIESAustralia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco

Singapore - Spain - Sweden - Switzerland - United Kingdom? 10/10

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